Keynote Speakers
December 10th, 2018
"Yet Another Leap Forward with Intelligent Semiconductor Manufacturing"
Atsuyoshi Koike, Ph.D.
Senior Vice President, Technology and Fab Operations, Western Digital Corporation
President, Western Digital Japan (Japan)
Abstract
In hindsight, the semiconductor industry has overcome various challenges to its evolution by introducing innovative ideas, concepts, methods, tools etc. for many years, making leaps for the next generations, and in turn, such leaps have contributed to acceleration toward next generation of semiconductor technology. This positive loop will never cease until we concede to really unavoidable limitations. In recent flash memory technologies, we have been actually seeing the 3D structures breaking through serious restrictions stemming from the conventional 2D memory arrays to meet accelerated demands for memory storage. In this talk, we will explore the future of semiconductor manufacturing, where innovative and AI-based tools revolutionize semiconductor design and manufacturing. Engineers in this new era will be expected to fully utilize advanced tools, orchestrate smart fab systems, and partner harmoniously with intelligent equipment.
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ATSUYOSHI KOIKE has served as senior vice president covering technology and fab operations since 2006. He leads Western Digital Japan operations, including overseeing the company's leading-edge 2D NAND and 3D NAND R&D and manufacturing operations in Japan. In this role, he also oversees Western Digital's joint ventures with Toshiba Memory Corporation.
Koike has over 30 years of experience driving innovations in the semiconductor industry. Prior to joining SanDisk (now Western Digital), he served as corporate chief engineer for Renesas Technology Corporation. Previously, he held the position of president and chief executive officer, as well as other senior leadership positions at Trecenti Technologies, Inc., where he successfully established the world's first 300mm wafer fab featuring all single wafer processing. Prior to that, he held senior manufacturing management and executive leadership positions at Hitachi, Ltd., where he focused on technological development in the semiconductor division, contributing to pivotal technological innovations for its mainstream semiconductor products for about two decades.
Koike received the B.S. and M.S. in Materials Science and Engineering from Waseda University and Ph.D. in Electronic Engineering from Tohoku University. He is a frequent public speaker and has given lectures at the University of Tokyo and Hitotsubashi University.
"Reshaping the Semiconductor Industry with IoT"
Yuzuru Utsumi
President, ARM K.K. (Japan)
December 11th, 2018
"A new manufacturing model in China's IC industry"
Dr. Richard Chang
Chairman, SiEn (QingDao) Integrated Circuits Ltd. (China)
Abstract
What is a CIDM SC company? The current operating model for the semiconductor manufacturing is generally classified as (1) IDM model or (2) Foundry model. Based on the needs of China market, Dr. Chang promotes an innovative Commune Integrated Design Manufacturing (CIDM) model that may fit more suitably for China's markets.
This CIDM model is to form a company with shared resources for manufacturing, chip design, research and development, packaging and testing providers; and to provide end customers with high-quality and high-efficiency products. Utilizing co-owning and co-sharing concept, IC design partners, the IC manufacturing fabs, the Assembly and Testing partners can invest and integrate multiple parties jointly through this unique company. The CIDM model is a win-win platform. It enables customers to gain stronger supports from all the partners; at the same time, it enables IC manufacturers to enjoy and share the market potential, resources, and reduce investment risk.
SiEn (QingDao) Integrated Circuits Co., Ltd. is a CIDM company, led by Dr. Chang, it is believed to be the first CIDM in China. SiEn plans to build both 8-inch and 12-inch manufacturing facilities and a photomask shop in Qingdao, Shandong Province.
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Dr. Richard R. Chang is currently the chairman for SiEn (Qingdao) Integrated Circuit Co. After receiving his bachelor's degree of Mechanical Engineering from National Taiwan University, he has earned a master's degree in Engineering Science from SUNY-Buffalo and a Ph.D. in Electrical Engineering from Southern Methodist University.
Dr. Richard Chang has more than 30 years of semiconductor experience, including 20 years with Texas Instruments in R&D and operations. He worked and managed more than 10 wafer fabs in the United States, Japan, Singapore, Italy, and Taiwan during his tenure with TI. Dr. Chang is the founder of SMIC, the largest semiconductor foundry in China. After his retirement from SMIC in June 2014, he set up Zing Semiconductor Corporation, also the largest and the most advanced 300mm-wafer semiconductor manufacturing company in China.
In March 2018, Dr. Chang and his team established a CIDM (Commune IDM) project in cooperation with Qingdao West Coast New Area Management Committee, Qingdao International Economic Cooperation Zone Management Committee, and Qingdao Aucma Holdings Group Co., Ltd. This project includes a few fabs of 8-inch and 12-inch manufacturing lines, and a photomask shop. Mass production of the fabs is scheduled for the second half of 2019.
"Technology Roadmaps for Devices and Systems for Cloud/IoT-edge platforms"
Dr. Yoshihiro Hayashi
Chairperson, SDRJ (The System Device Roadmap Committee of Japan)
Senior Principal Specialist, Home Business Div.,
Renesas Electronics Corporation (Japan)
Abstract
New system-device roadmap, IRDS, forecasting future for 15 years, is explained. Higher integration of the semiconductor devices continues with the 3D structuration over the 2D scaling after around 2025, while the system platform consisting of cloud / mobile / IoT-edge computing is going to be kept evolving with the high-speed mobile communication and the artificial intelligence. Destructive innovation for lower power / higher efficiency computation is a key for realizing both.
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Education:
1987, Ph.D (Applied Chemistry), Faculty of Science and Technology, KEIO University
Experience:
1985, Visiting Researcher, Center of Ceramic Research, Rutgers University, NJ, USA.
1992, Visiting Fellow, Thayer School of Engineering, Dartmouth College, NH, USA
1987-2007: Central Research Lab., NEC Corporation, on ULSI device integration technology.
2008-2009: LSI Fundamental Research Lab., NEC Electronics Corporation
2010~Present: Renesas Electronics Corporation for RF and Healthcare solutions developments
2001-2003: Executive Committee, IEEE IEDM
2013-2015: Chair of STRJ promotion committee, JSIA, JEITA.
2017: Chief examiner, Healthcare WG, JSIA, JEITA.
2017-Current: Chair of Systems and Devices Roadmap committee, SDRJ, JSAP
"Some Manufacturing and Business Consideration for Advanced NAND Production"
Dr. Simon Yang
CEO, Yangtze Memory Technologies Co., Ltd. (YMTC) (China)
Abstract
3D NAND has rapidly become the standard technology for enterprise flash, and is also gaining widespread use in other applications as well. However, with the array stacking becoming 128 layers or even higher, conventional NAND memory chip manufacturing is facing new challenges: process conditions incompatibility between array and CMOS; the massive topography difference between the skyscraper array and planar CMOS; increased cost due to much reduced common process steps between array and CMOS; long cycle times for R&D and production, etc.
PUC (Peripheral Under Cells), "4D NAND", and XtackingTM are some of the new technologies proposed and developed in the industry to address those issues. In this talk, the author will attempt to analyze these approaches from technology and manufacturing perspectives, identify major tradeoffs, and propose possible directions for future work.
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Dr. Simon Yang, CEO of YMTC. In the past 20 years, Simon has served as the CEO of XMC, COO/CTO of SMIC, and CTO/SVP of Chartered Semiconductor (Now Global Foundries). Before that he was with Portland Technology Development group in Intel for more than 10 years. Simon got his Bachelor Degree from Shanghai University of Science & Technology, Master Degree and Doctor Degree from Rensselaer Polytechnic Institute. He holds more than 20 patents and published over 30 articles.
"Achievement Strategy of High Quality and Productivity with Lowest Input in High Volume Manufacturing"
Dr. JI CHUL YANG
Research Fellow, Manufacturing Division,
SK Hynix (Korea)
Abstract
Semiconductor business has been successfully maintained Golden Performance with endless shrinking devices even though there were repeated-issues such as mal-patterning and defect issues. However, it become tougher for manufacturer to overcome the target with 1x nm high-end devices on planned time. While development site is struggling with scaling, new materials and structures, manufacturing area are now confronting flow complexities and process interdependencies from wafer starting to fab-out. Especially extended production cycle gave more dynamics and ambiguities to control device performance. It's a fact that traditional problem-solving methods are no more effective in current situations. In this presentation, enablement strategy will be discussed to minimize inputs in manufacturing sites with respect to advanced diagnostics, manufacturing-friendly equipment design, and defect preventive process design. ML(Machine Learning), FDC(Fault Detection and Classification), TTTM(Tool-to-Tool Matching) Sensor will be covered in this talk.
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Dr. Ji Chul Yang is Research Fellow at SKhynix Semiconductor in South Korea. Since he joined SKhynix in 2017, he is now responsible for Creative Cleaning & CMP team and is the committee member of innovative executive team in Manufacturing Division. Prior to SKhynix, he was CMP team leader and CMP Representative of Future Technology Roadmap Team at GLOBALFOUNDRIES U.S. He was also engaged in developing 14nm & 7 nm logic process as technical leader. Prior to his time with Globalfoundries, Dr. Yang was CMP Project Leader in Line 16, SAMSUNG Memory Division in South Korea. He has experiences throughout Memory (NAND and DRAM) and Logic Foundries Device. He was invited talker for ICPT2010, ICPT2014, 60th KCMPUGM, ECS2016, 20th CAMP, SEMICONWEST-CMP2016, STS2017 and CMPUGM2018. Dr. Yang has a Ph.D degree in Electronics Engineering from SUNGKYUNKWAN University, South Korea, Master's degree in Mechanical Engineering from YONSEI University, South Korea. He has authored more than 40 technical publications and conference presentations with semiconductor items.